Test MP+dmb.sy+ctrl-[fr-rf]-ctrl

AArch64 MP+dmb.sy+ctrl-[fr-rf]-ctrl
"DMB.SYdWW Rfe DpCtrldR FrLeave RfBack DpCtrldR Fre"
Cycle=Rfe DpCtrldR FrLeave RfBack DpCtrldR Fre DMB.SYdWW
Relax=
Safe=Rfe Fre DMB.SYdWW DpCtrldR [FrLeave,RfBack]
Prefetch=0:x=F,0:y=W,1:y=F,1:x=T
Com=Rf Fr Rf
Orig=DMB.SYdWW Rfe DpCtrldR FrLeave RfBack DpCtrldR Fre
{
0:X1=x; 0:X3=y;
1:X1=y; 1:X3=z; 1:X6=x;
2:X1=z;
}
 P0          | P1           | P2          ;
 MOV W0,#1   | LDR W0,[X1]  | MOV W0,#1   ;
 STR W0,[X1] | CBNZ W0,LC00 | STR W0,[X1] ;
 DMB SY      | LC00:        |             ;
 MOV W2,#1   | LDR W2,[X3]  |             ;
 STR W2,[X3] | LDR W4,[X3]  |             ;
             | CBNZ W4,LC01 |             ;
             | LC01:        |             ;
             | LDR W5,[X6]  |             ;
Observed
    z=1; y=1; x=1; 1:X5=1; 1:X4=0; 1:X2=1; 1:X0=1;
and z=1; y=1; x=1; 1:X5=0; 1:X4=0; 1:X2=1; 1:X0=1;
and z=1; y=1; x=1; 1:X5=1; 1:X4=0; 1:X2=1; 1:X0=0;
and z=1; y=1; x=1; 1:X5=0; 1:X4=0; 1:X2=1; 1:X0=0;